6.1. Implementation of CvP Initialization Mode
CvP Initialization mode splits the bitstream into periphery and core images. The periphery image is stored in a local flash device on the PCB. The core image is stored in host memory. You must download the core image to the FPGA using the PCI Express link.
You must specify CvP Initialization mode in the Intel® Quartus® Prime Pro Edition software by selecting the CvP Settings Initialization and Update and you must also instantiate the PCI Express IP core.
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