HDMI Intel® Stratix 10 FPGA IP Design Example User Guide

ID 683701
Date 9/07/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

4.6.1. HDCP Status Signals

There are several signals that are useful to identify the working condition of the HDCP IP cores. These signals are available at the design example top-level and are tied to the onboard LEDs:

Signal Name

Function

hdcp1_enabled_rx

RX HDCP1x IP Decryption Status

0: Inactive

1: Active

hdcp2_enabled_rx

RX HDCP2x IP Decryption Status

0: Inactive

1: Active

hdcp1_enabled_tx

TX HDCP1x IP Encryption Status

0: Inactive

1: Active

hdcp2_enabled_tx

TX HDCP2x IP Encryption Status

0: Inactive

1: Active

Refer to Table 55 and Table 56 for their respective LED placements.

The active state of these signals indicates that the HDCP IP is authenticated and receiving/sending encrypted video stream. For each direction, only HDCP1x or HDCP2x encryption/decryption status signals is active. For example, if either hdcp1_enabled_rx or hdcp2_enabled_rx is active, the HDCP on the RX side is enabled and decrypting the encrypted video stream from the external video source.