HDMI Intel® Stratix 10 FPGA IP Design Example User Guide

ID 683701
Date 9/07/2022
Document Table of Contents
Give Feedback

2.7. Design Software Flow

In the design main software flow, the Nios® II processor configures the TI redriver setting and initializes the TX and RX paths upon power-up.
Figure 14. Software Flow in main.c Script

The software executes a while loop to monitor sink and source changes, and to react to the changes. The software may trigger TX reconfiguration, TX link training and start transmitting video.

Figure 15. TX Path Initialization Flowchart
Figure 16. RX Path Initialization Flowchart
Figure 17. TX Reconfiguration and Link Training Flowchart
Figure 18. Link Training LTS:3 Process at Specific FRL Rate Flowchart
Figure 19. HDMI TX Video Transmission Flowchart