Intel® Stratix® 10 Logic Array Blocks and Adaptive Logic Modules User Guide

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ID 683699
Date 3/08/2022
Public

3.1.3. Carry Chain Interconnects

There is a dedicated carry chain path between the ALMs. Intel® Stratix® 10 devices include an enhanced interconnect structure in LABs for routing carry chains for efficient arithmetic functions. These ALM-to-ALM connections bypass the local interconnect.

The Intel® Hyperflex™ registers are added to the carry chain to enable flexible retiming across a chain of LABs and the Intel® Quartus® Prime Compiler automatically takes advantage of these resources to improve utilization and performance.

Figure 4. Carry Chain Interconnects

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