Intel Agilex® 7 Configuration User Guide

ID 683673
Date 4/28/2023

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Document Table of Contents Supported Flash Memory Devices

The Intel® Quartus® Prime software generates the PFL II IP core logic for the flash programming bridge and FPGA configuration.
Table 33.  CFI Flash Memory Devices Supported by PFL II Intel FPGA IP CoreIf your CFI device is not listed in this table but is compatible with an Intel® Quartus® Prime flash device, Intel recommends selecting Define CFI Flash Device in the Intel® Quartus® Prime software.
Manufacturer Product Family Data Width Density (Mbit) Device Name
Micron MT28EW 8 or 16 256 MT28EW256ABA1
512 MT28EW512ABA1
1024 MT28EW01GABA1
Infineon GL-S 16 256 S29GL256S
512 S29GL512S
1024 S29GL01GS
Table 34.  Quad SPI Flash Memory Devices Supported by PFL II Intel FPGA IP Core
Manufacturer Product Family Density (Mbit) Device Name
Micron MT25QU 256 MT25QU256ABA
512 MT25QU512ABB
1024 MT25QU01GBBB
2048 MT25QU02GCBB
Macronix MX66U12 2048 MX66U2G45G
12 Perform these steps to enable flash on this device.
  1. Select Macronix as the QSPI flash manufacturer and 2 Gbit as the flash density.
  2. In the top-level file altera_parallel_flash_loader_2.v, change the value for FLASH_STATIC_WAIT_WIDTH to 22 once the HDL files for the PFL II IP are generated. The default value is 15.