Intel Agilex® 7 Configuration User Guide

ID 683673
Date 4/28/2023

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Document Table of Contents

1.1.1. Configuration and Related Signals

The following figure shows the configuration interfaces and configuration-related device functions. Pins shown in dark blue use dedicated SDM I/Os. Pins shown in black use general purpose I/Os (GPIOs). Pins shown in red are dedicated JTAG I/Os.

You specify SDM I/O pin functions using the Device > Configuration > Device and Pin Options dialog box in the Intel® Quartus® Prime software.

Figure 1.  Intel Agilex® 7 Configuration Interfaces

This user guide discusses most of the interfaces shown in the figure. Refer to the separate Intel Agilex® 7 Configuration via Protocol (CvP) Implementation User Guide and Intel Agilex® 7 Power Management User Guide for more information about those features.