Key Advantages of MAX® 10 Devices
Summary of MAX® 10 Device Features
MAX® 10 Device Ordering Information
MAX® 10 Device Maximum Resources
MAX® 10 Devices I/O Resources Per Package
MAX® 10 Vertical Migration Support
Logic Elements and Logic Array Blocks
Analog-to-Digital Converter
User Flash Memory
Embedded Multipliers and Digital Signal Processing Support
Embedded Memory Blocks
Clocking and PLL
FPGA General Purpose I/O
External Memory Interface
Configuration
Power Management
Revision History for the MAX® 10 FPGA Device Overview
LVDS Tunneling Protocol and Interface
The MAX® 10 devices support LVDS Tunneling Protocol and Interface (LTPI) soft IP in the Quartus® Prime software, specifically targeting data center applications.
The Datacenter - Secure Control Module (DC-SCM) 2.0 specification introduces LTPI and offers higher bandwidth and better scalability compared to the serial general purpose I/O (SGPIO) interface. The LTPI interface is designed to tunnel various low-speed signals (such as GPIO, I2C, UART, data, and OEM) between the Host Processor Module (HPM) and Secure Control Module (SCM). The LTPI protocol operates over the low voltage differential signaling (LVDS) electrical interfaces.
Figure 5. High-level Block Diagram of LTPI
| Feature | Description |
|---|---|
| Specification | Compliant with OCP DC-SCM 2.0 LTPI 1.0. |
| Speed Grade | Supports all speed grade configuration for the MAX® 10 devices. |
| Channel |
|
| Link Training | Supports link training for reliable link operation. |
| Speed | Supports up to 400 Mbps data rate for all speed grade configuration in the MAX® 10 devices. |
Note: The LTPI IP is currently under development.