Visible to Intel only — GUID: myt1397044399344
Ixiasoft
Key Advantages of Intel® MAX® 10 Devices
Summary of Intel® MAX® 10 Device Features
Intel® MAX® 10 Device Ordering Information
Intel® MAX® 10 Device Maximum Resources
Intel® MAX® 10 Devices I/O Resources Per Package
Intel® MAX® 10 Vertical Migration Support
Logic Elements and Logic Array Blocks
Analog-to-Digital Converter
User Flash Memory
Embedded Multipliers and Digital Signal Processing Support
Embedded Memory Blocks
Clocking and PLL
FPGA General Purpose I/O
External Memory Interface
Configuration
Power Management
Document Revision History for Intel® MAX® 10 FPGA Device Overview
Visible to Intel only — GUID: myt1397044399344
Ixiasoft
Embedded Multipliers and Digital Signal Processing Support
Intel® MAX® 10 devices support up to 144 embedded multiplier blocks. Each block supports one individual 18 × 18-bit multiplier or two individual 9 × 9-bit multipliers.
With the combination of on-chip resources and external interfaces in Intel® MAX® 10 devices, you can build DSP systems with high performance, low system cost, and low power consumption.
You can use the Intel® MAX® 10 device on its own or as a DSP device co-processor to improve price-to-performance ratios of DSP systems.
You can control the operation of the embedded multiplier blocks using the following options:
- Parameterize the relevant IP cores with the Intel® Quartus® Prime parameter editor
- Infer the multipliers directly with VHDL or Verilog HDL
System design features provided for Intel® MAX® 10 devices:
- DSP IP cores:
- Common DSP processing functions such as finite impulse response (FIR), fast Fourier transform (FFT), and numerically controlled oscillator (NCO) functions
- Suites of common video and image processing functions
- Complete reference designs for end-market applications
- DSP Builder for Intel® FPGAs interface tool between the Intel® Quartus® Prime software and the MathWorks Simulink and MATLAB design environments
- DSP development kits