AN 672: Transceiver Link Design Guidelines for High-Gbps Data Rate Transmission

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ID 683624
Date 1/29/2020
Public
Document Table of Contents
Document Table of Contents x
1. AN 672: Transceiver Link Design Guidelines for High-Gbps Data Rate Transmission
1. AN 672: Transceiver Link Design Guidelines for High-Gbps Data Rate Transmission x
1.1. PCB Material Selection 1.2. Stackup Design 1.3. Channel Design 1.4. Summary 1.5. Document Revision History for the AN 672: Transceiver Link Design Guidelines for High-Gbps Data Rate Transmission
1.1. PCB Material Selection x
1.1.1. Loss Tangent and Dissipation Factor 1.1.2. Dielectric Constant 1.1.3. Fiberglass Weave 1.1.4. Copper Surface Roughness
1.3. Channel Design x
1.3.1. BGA Channel Breakout 1.3.2. Channel Routing Design 1.3.3. Edge Coupling 1.3.4. Broadside Coupling 1.3.5. Transparent Via Design 1.3.6. Blocking Cap Optimization 1.3.7. Connectors Optimization
1.3.2. Channel Routing Design x
1.3.2.1. Trace Width Selection 1.3.2.2. Loose vs. Tight Coupled Traces 1.3.2.3. Crosstalk Control
1.4. Summary x
1.4.1. PCB Material Selection 1.4.2. Stackup Design 1.4.3. Channel Design 1.4.4. References
1. AN 672: Transceiver Link Design Guidelines for High-Gbps Data Rate Transmission

1.4.4. References

  • Base Materials for High Speed, High Frequency PC Boards, Rick Hartley, PCB&A, Mar 2002
  • High-Speed Digital Design, Handbook of Black Magic, Howard Johnson & Martin Graham, Professional Technical Reference, Upper Saddle River, NJ 07458, 1993
  • Signal Integrity – Simplified, Dr. Eric Bogatin, Prentice Hall Professional Technical Reference, Upper Saddle River, NJ 07458, Dec 2006
  • A Survey and Tutorial of Dielectric Materials Used In the Manufacture of Printed Circuit Boards, Lee W. Ritchey, Speeding Edge, Circuitree Magazine, Nov 1999
  • High-Speed Digital Systems Design, A Handbook of Interconnect Theory and Design Practices. Stephen W. Hall, Garrett W. Hall, James A. McCall, New York, John Wiley & Sons, Inc., 2000
  • Discussions on Non Functional Pad Removal / Backdrilling and PCB Reliability, Bill Birch, PWB Interconnect Solutions Inc., 103-235 Stafford Road West, Nepean, Ontario, Canada
  • A Practical Method for Modeling PCB Transmission Lines with Conductor Surface Roughness and Wideband Dielectric Properties, Tao Liang, Stephen Hall, Howard Heck & Gary Brist
  • Non-Classical Conductor Losses Due to copper Foil Roughness and Treatment, Gary Brist, Stephen Hall, Sidney Clouser, & Tao Liang
  • CEI-25G-LR and CEI-28G-VSR Multi-Vendor Interoperability Testing White Paper, Optical Internetworking Forum, March 2012
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