Intel® Cyclone® 10 LP FPGA Evaluation Kit User Guide

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ID 683580
Date 12/19/2019
Public
Document Table of Contents
Document Table of Contents x
1. Overview 2. Getting Started 3. Evaluation Board Setup 4. Evaluation Board Components 5. Simple Socket Server 6. Board Test System A. Safety and Regulatory Information B. Additional Information
1. Overview x
1.1. Evaluation Kit Description 1.2. Recommended Operating Conditions 1.3. Handling the Board 1.4. Evaluation Board Revisions
1.1. Evaluation Kit Description x
1.1.1. Evaluation Board Description 1.1.2. Evaluation Kit Collateral 1.1.3. Power Supply Description
2. Getting Started x
2.1. Installing Quartus Prime Software 2.2. Installing the Evaluation Kit Collateral 2.3. Installing Intel® FPGA Download Cable Driver
3. Evaluation Board Setup x
3.1. Powering Up the Evaluation Board 3.2. Default Switch Settings 3.3. Recovering Factory Default Settings
4. Evaluation Board Components x
4.1. Board Overview 4.2. Intel® Cyclone® 10 LP FPGA Overview 4.3. MAX 10 System Controller Overview 4.4. FPGA Configuration 4.5. Status Elements 4.6. Setup Elements 4.7. General User Input/Output 4.8. Clocks 4.9. Connectors and Interfaces 4.10. Memory 4.11. System Power
4.4. FPGA Configuration x
4.4.1. Using the Quartus Prime Programmer 4.4.2. Program On-Board EPCQ or EPCQ-A Flash Memory 4.4.3. Active Serial Configuration
4.9. Connectors and Interfaces x
4.9.1. Gigabit Ethernet PHY 4.9.2. 2x20 GPIO Expansion Header 4.9.3. Arduino Connectors 4.9.4. Pmod Connectors
4.9.3. Arduino Connectors x
4.9.3.1. Digital IOs 4.9.3.2. Analog Inputs 4.9.3.3. Arduino Power
4.10. Memory x
4.10.1. HyperRAM 4.10.2. EPCQ or EPCQ-A Flash Memory
4.11. System Power x
4.11.1. Power Supply Options 4.11.2. Power Tree 4.11.3. Current Measurement
5. Simple Socket Server x
5.1. Connecting to the Simple Socket Server
6. Board Test System x
6.1. The Configure Menu 6.2. The System Info Tab 6.3. The GPIO Tab 6.4. The Flash Tab 6.5. The HyperRAM Tab 6.6. The Power Monitor 6.7. The Clock Control
A. Safety and Regulatory Information x
A.1. Safety Warnings A.2. Safety Cautions
B. Additional Information x
B.1. Revision History B.2. Compliance and Conformity Statements
1. Overview
2. Getting Started
3. Evaluation Board Setup
4. Evaluation Board Components
5. Simple Socket Server
6. Board Test System
A. Safety and Regulatory Information
B. Additional Information

4.1. Board Overview

This topic provides a high-level list of major components on the Intel® Cyclone® 10 LP FPGA evaluation board.
Figure 5.  Intel® Cyclone® 10 LP FPGA Evaluation Board Block Diagram
Table 4.  Board Components
Board Reference Type Description
Featured Devices
U1 FPGA Intel® Cyclone® 10 LP FPGA 10CL025YU256I7G, 25k LEs, U256 package
U3 FPGA Intel® MAX® 10 10M08SAU169C8G for On-board Intel® FPGA Download Cable II and System Management
U25 Power Regulator Intel® Enpirion® EN5329QI - 2A PowerSoC Low Profile Synchronous Buck DC-DC Converter with Integrated Inductor
U23 Power Regulator Intel® Enpirion® EN5339QI - 3A PowerSoC Low Profile Synchronous Buck DC-DC Converter with Integrated Inductor
U26, U27 Power Regulator Intel® Enpirion® EP5358HUI, 600 mA PowerSoC DC-DC step-down converters with integrated inductor.
U14 Gigabit Ethernet PHY Intel XWAY PHY11G Single Port Gigabit Ethernet PHY (10/100/1000 Mbps) PEF7071
Configuration and Setup Elements
J17 Embedded Intel® FPGA Download Cable II Type-B Mini USB Connector for programming and debugging the FPGA
J2 10-pin header Optional JTAG direct through 10-pin header for external download cables
SW1.4 Virtual JTAG TAP Bypass Switch

ON/Closed/0: Bypass Virtual JTAG TAP

OFF/Open/1: Enable Virtual JTAG TAP
S1 FPGA nCONFIG push button Press this button to trigger reconfiguration
S2 FPGA reset push button Press this button to reset all registers in the FPGA
Status Elements
D4 Power LED (Blue)

Power Good LED (Detects VCC_3.3V and VCC_1.2V)

ON: Detected Power is Good

OFF: Detected Power is Bad
D5 Configuration LED (Yellow)

Config done status Indicator

ON: FPGA configured successfully

OFF: FPGA not configured
D10 Ethernet LED0 (Green)

Ethernet link status indicator

ON: Link-up

OFF: Link-down

Blink: Link-up with traffic
D11 Ethernet LED1 (Green)

Ethernet link speed indicator

ON: 100 Mbps

OFF: 10/1000 Mbps or Link-down
D12 Ethernet LED2 (Green)

Ethernet link speed indicator

ON: 1000 Mbps

OFF: 10/1000 Mbps or Link-down
Clock Circuits
U20 50 MHz Oscillator 50 MHz crystal oscillator for general purpose logic of Intel® Cyclone® 10 LP FPGA and Intel® MAX® 10 FPGA devices
U31 Programmable clock generator Three channel Programmable clock generator. Default frequencies are 125 MHz, 100 MHz and 50 MHz
General User Input/Output
S3, S4, S5, S6 General user push buttons Four user push buttons. Driven low when pressed.
D6, D7, D8, D9 User LEDs Four user LEDs. Illuminates when driven low.
SW1.1 - SW1.3 User DIP Switches 3-bit user DIP switches
Memory Devices
U13 HyperRAM Memory 128 Mb x8 HyperRAM with 1.8 V I/O
U2 Flash
  • Board Rev A1: 64 Mb EPCQ
  • Board Rev A2: 128 Mb EPCQ-A1
I/O and Expansion Ports
J8 One Digilent Pmod Connector 12-pin interface with 8 I/O signal pins used to connect low frequency, low I/O peripheral modules
J4, J5, J6, J7, J18 Arduino UNO R3 type connector Arduino UNO R3 type connectors with 3.3 V digital I/O and six analog input channels
J10 2x20 GPIO Expansion Header 2x20 GPIO Expansion Header with 36 I/O
J16 One Gigabit Ethernet Port RJ-45 connector provides a 10/100/1000 Ethernet connection through a Intel PEF7071 PHY and the FPGA-based Intel Triple Speed Ethernet MegaCore function in RGMII mode
Power Supply
J12 DC input jack Supplemental 5 V DC power adapter connector
J17 USB Mini-B Connector For 5 V power from USB port also used as Intel® FPGA Download Cable communication port
Related Information
1 To identify your board revision, see "EPCQ or EPCQ-A Flash Memory".
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