Intel® Quartus® Prime Standard Edition User Guide: Design Constraints

ID 683492
Date 1/10/2019
Public
Document Table of Contents

2. Managing Device I/O Pins

This chapter describes efficient planning and assignment of I/O pins in your target device. Consider I/O standards, pin placement rules, and your PCB characteristics early in the design phase.

Figure 4. Pin Planner GUI


Table 4.   Intel® Quartus® Prime I/O Pin Planning Tools

I/O Planning Task

Click to Access

Edit, validate, or export pin assignments

Assignments > Pin Planner

View tailored pin planning advice

Tools > Advisors > Pin Advisor

Validate pin assignments against design rules

Processing > Start > Start I/O Assignment Analysis

For more information about special pin assignment features for the Intel® Arria® 10 SoC devices, refer to Instantiating the HPS Component in the Intel® Arria® 10 Hard Processor System Technical Reference Manual.

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