Integer Arithmetic Intel® FPGA IP Cores User Guide

ID 683490
Date 4/01/2024
Document Table of Contents

13.6. Parameters

The following table lists the parameters for the ALTSQRT IP core.
Parameter Name Type Required Description
WIDTH Integer Yes Specifies the widths of the radical[] input port.
Q_PORT_WIDTH Integer Yes Specifies the width of the q[] output port.
R_PORT_WIDTH Integer Yes Specifies the width of the remainder[] output port.
PIPELINE Integer No Specifies the number of clock cycles of latency to add.
LPM_HINT String No

When you instantiate a library of parameterized modules (LPM) function in a VHDL Design File (.vhd), you must use the LPM_HINT parameter to specify an Intel® -specific parameter. For example: LPM_HINT = "CHAIN_SIZE = 8, ONE_INPUT_IS_CONSTANT = YES"

The default value is UNUSED.
LPM_TYPE String No Identifies the library of parameterized modules (LPM) entity name in VHDL design files.