Key Advantages of Intel® Cyclone® 10 GX Devices Summary of Intel® Cyclone® 10 GX Features Intel® Cyclone® 10 GX Available Options Intel® Cyclone® 10 GX Maximum Resources Intel® Cyclone® 10 GX Package Plan I/O Vertical Migration for Intel® Cyclone® 10 GX Devices Adaptive Logic Module Variable-Precision DSP Block Embedded Memory Blocks Clock Networks and PLL Clock Sources FPGA General Purpose I/O External Memory Interface PCIe Gen1 and Gen2 Hard IP Enhanced PCS Hard IP for Interlaken and 10 Gbps Ethernet Low Power Serial Transceivers Dynamic and Partial Reconfiguration Enhanced Configuration and Configuration via Protocol SEU Error Detection and Correction Power Management Incremental Compilation Document Revision History for Intel® Cyclone® 10 GX Device Overview
I/O Vertical Migration for Intel® Cyclone® 10 GX Devices
Figure 2. Migration Capability Across Intel® Cyclone® 10 GX Product Lines
- The arrows indicate the migration paths. The devices included in each vertical migration path are shaded. Devices with fewer resources in the same path have lighter shades.
- To achieve the full I/O migration across product lines in the same migration path, restrict I/Os and transceivers usage to match the product line with the lowest I/O and transceiver counts.
Note: To verify the pin migration compatibility, use the Pin Migration View window in the Intel® Quartus® Prime Pro Edition software Pin Planner.
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