AN 114: Board Design Guidelines for Intel Programmable Device Packages

ID 683481
Date 5/27/2022
Public
Document Table of Contents

1.3.4.1. Sample PCB Layout for 1.00-mm Flip-Chip BGA and 0.80-mm UBGA (BT Substrate)

The blind via layout in the following figures require only two PCB layers. The signals from the first two balls can be routed directly through the first layer. The signals from the third and fourth balls can be routed through a via and out the second layer, and the signal from the fifth ball can be routed under the vias for the third and fourth balls and out the second layer. Together, only two PCB layers are required.

In contrast, the through via layout in the following figures require three PCB layers, because signals cannot be routed under through vias. The signals from the third and fourth balls can still be routed through a via and out the second layer, but the signal from the fifth ball must be routed through a via and out the third layer. Using blind vias rather than through vias in this example, saves one PCB layer.

Figure 20. Sample PCB Layout for 1.00-mm Flip-Chip BGAThis is not applicable for Intel® Stratix® 10 devices.
Figure 21. Sample PCB Layout for 0.80-mm UBGA (BT Substrate)

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