Vision Processing with the Canny Edge Detection Reference Design

ID 683433
Date 2/14/2015
Document Table of Contents

1.3.4. Canny Edge Reference Design Initial Startup Problems

Table 3.  Initial Startup Problems
Problem Solution
Monitor output is black Remove the DVI transmitter cable and reinsert it.
Monitor output is fuzzy Press the CPU reset button to reset the FPGA design. Press the reset button until synchronization is achieved (i.e. video is sharp).