Video and Vision Processing Suite Intel® FPGA IP User Guide

ID 683329
Date 9/30/2021

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Document Table of Contents

Warp IP Features

  • Avalon memory-mapped interface for memory access
  • Fixed 10 bits per color RGB
  • One or two pixels in parallel
  • Two to three frame latency
  • Maximum image size of 3840x2160
  • Minimum image size of 128x64
  • Output image width must be multiple of 16
  • Output image height must be multiple of 8