AN 821: Interface Planning for Intel® Stratix® 10 FPGAs

ID 683307
Date 12/15/2017

1.3.5. Step 5: Report Placement Data

You can generate Interface Planner placement and connectivity reports to help locate cells and make the best decisions about placement for the interfaces and elements in your design.

Follow these steps to access the placement reports

  1. Click the Reports tab. This tab displays a range of reports.
  2. In the Tasks list, click any report name to generate that report. The reports are interactive, allowing you select and Place, Unplace, or Report detailed data about the selected element.
  3. In the Flow control, click View Summary Report. The Interface Planner Summary lists details about IP block and periphery cell placement.
    Figure 18. Interface Planner Summary Report
  4. In the Tasks list, click Report All Placed Pins. The Placed Pins report shows that all IP have pin assignments.
    Figure 19. Report All Placed Pins