Nios II Classic Software Developer’s Handbook

ID 683282
Date 5/14/2015
Public
Document Table of Contents

8.1.3.2. Shadow Register Sets

In conjunction with an EIC, shadow register sets speed up hardware interrupt response by making it unnecessary to save registers on the stack. This feature has no impact on interrupt latency, but significantly reduces interrupt response time.

Shadow register sets have no impact on software exception response time.