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1.6. Compiling and Configuring the Design Example in Hardware
To compile the hardware design example and configure it on your Intel® Agilex™ device, follow these steps:
- Ensure hardware design example generation is complete.
- In the Intel® Quartus® Prime Pro Edition software, open the Intel® Quartus® Prime project <design_example_dir>/hardware_test_design/cpriphy_ftile_hw.qpf.
- Edit the .qsf file to assign pins based on your hardware.
- On the Processing menu, click Start Compilation.
- After successful compilation, a .sof file is available in <design_example_dir>/hardware_test_design/output_files directory. Follow these steps to program the hardware design example on the Intel® Agilex™ device:
- Connect Intel® Agilex™ I-series Transceiver Signal Integrity Development Kit to the host computer.
Note: The development kit is preprogrammed with the correct clock frequencies by default. You do not need to use the Clock Control application to set the frequencies.
- On the Tools menu, click Programmer.
- In the Programmer, click Hardware Setup.
- Select a programming device.
- Ensure that Mode is set to JTAG.
- Select the Intel® Agilex™ device and click Add Device. The Programmer displays a block diagram of the connections between the devices on your board.
- In the row with your .sof, check the box for the .sof.
- Check the box in the Program/Configure column.
- Click Start.
- Connect Intel® Agilex™ I-series Transceiver Signal Integrity Development Kit to the host computer.