Serial Lite IV Intel® Stratix™ 10 FPGA IP Design Example User Guide

ID 683223
Date 11/01/2021
Document Table of Contents

3.4.2. Hardware Testing Result for Full Transfer Mode

The following are samples of hardware testing results for each design example variant.

Figure 14. Example of System Console Printout for PAM4 with RS-FEC Enabled
Figure 15. Example of System Console Printout for NRZ with RS-FEC Enabled
Note: The NRZ without RS-FEC enabled variant (RS-FEC mode: 0) has similar system console printout.