Serial Lite IV Intel® Stratix™ 10 FPGA IP Design Example User Guide

ID 683223
Date 11/01/2021
Public
Document Table of Contents

3. Detailed Description for Serial Lite IV Design Example

This design example demonstrates the functionality of data streaming using basic and full mode.

You can specify the parameter settings of your choice and generate the design example.

The design example is available only in duplex mode.

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