Serial Lite IV Intel® Stratix™ 10 FPGA IP Design Example User Guide

ID 683223
Date 11/01/2021
Document Table of Contents

2. Quick Start Guide

The Serial Lite IV Intel® FPGA IP provides the ability to generate design examples for selected configurations.

The Serial Lite IV Intel® FPGA IP design example for Intel® Stratix® 10 devices features a simulation testbench and a hardware design that supports compilation and hardware testing. The design example demonstrates loopback mode designs in basic or full mode for duplex configurations.

Figure 1. Development Stages for the Design Example