Intel® Stratix® 10 JTAG Boundary-Scan Testing User Guide

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ID 683207
Date 7/27/2021
Public

2.4.2. IEEE Std. 1149.6 BST Circuitry for Intel® Stratix® 10 P-Tile Transceiver

Figure 9. HSSI Transmitter BSC for Intel® Stratix® 10 P-Tile Transceiver
Figure 10. HSSI Receiver BSC for Intel® Stratix® 10 P-Tile Transceiver
Figure 11. I_PIN_PERST_N Input Pin BSC for Intel® Stratix® 10 P-Tile Transceiver

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