The BSCs for HSSI transmitters ( GXB_TX[p,n] ) and receivers/input clock buffers (GXB_RX[p,n]) /(REFCLK[p,n]) in Intel® Stratix® 10 devices are different from the BSCs for the I/O pins.
Note: You have to use the EXTEST_PULSE JTAG instruction for AC-coupling on HSSI transceiver. Do not use the EXTEST JTAG instruction for AC-coupling on HSSI transceiver. You can perform AC JTAG on the Intel® Stratix® 10 device before, after, and during configuration.
Figure 4. HSSI Transmitter BSC for Intel® Stratix® 10 Devices
Figure 5. HSSI Receiver/Input Clock Buffer for Intel® Stratix® 10 Devices
Figure 6. UIB and eSRAM BSC for Intel® Stratix® 10 DevicesThe differential reference clock input pins for UIB and eSRAM are sharing the BSC per pair as shown in this figure. The capture value (DATAIN) would be invalid if one or both differential inputs are abnormal.