F-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* User Guide

ID 683140
Date 2/03/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

3.10.1. Configuration Registers Access

There are two methods to access the configuration registers:
  • Using direct User Avalon-MM interface (byte access)
  • Using the Debug (DBI) register access (dword access). This method is useful when you need to read/write the entire 32 bits at one time (Counter/ Lane Margining, etc.)