GPIO Intel® FPGA IP User Guide: Intel® Arria® 10 and Intel® Cyclone® 10 GX Devices

ID 683136
Date 7/15/2021
Public

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Input and Output Bus High and Low Bits

The high and low bits in the input or output signals are included in the din and dout input and output buses.

Input Bus

For the din bus, if datain_h and datain_l are the high and low bits, with each width being datain_width:

  • datain_h = din[(2 × datain_width - 1):datain_width]
  • datain_l = din[(datain_width - 1):0]

For example, for din[7:0] = 8'b11001010:

  • datain_h = 4'b1100
  • datain_l = 4'b1010

Output Bus

For the dout bus, if dataout_h and dataout_l are the high and low bits, with each width being dataout_width:

  • dataout_h = dout[(2 × dataout_width - 1):dataout_width]
  • dataout_l = dout[(dataout_width - 1):0]

For example, for dout[7:0] = 8'b11001010:

  • dataout_h = 4'b1100
  • dataout_l = 4'b1010

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