AN 851: Incremental Block-Based Compilation Tutorial: for Intel® Arria® 10 FPGA Development Board

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ID 683079
Date 7/15/2019
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Document Table of Contents
Document Table of Contents x
1. AN 851: Incremental Block-Based Compilation Tutorial for Intel® Arria® 10 FPGA Development Board
1. AN 851: Incremental Block-Based Compilation Tutorial for Intel® Arria® 10 FPGA Development Board x
1.1. Tutorial Design Overview 1.2. Downloading Tutorial Design Files 1.3. Incremental Block-Based Compilation Tutorial 1.4. Incremental Block-Based Compilation Tutorial Revision History
1.3. Incremental Block-Based Compilation Tutorial x
1.3.1. Step 1: Compile the Flat Design 1.3.2. Step 2: Identify Timing-Critical Design Blocks 1.3.3. Step 3: Create Design Partitions 1.3.4. Step 4: Analyze Timing of the Partitioned Design 1.3.5. Step 5: Preserve Timing-Closed Partitions 1.3.6. Step 6: Optimize Timing-Critical Design Blocks 1.3.7. Step 7: Verify Preservation and Optimized Results 1.3.8. (Optional) Step 8: Device Programming 1.3.9. (Optional) Step 9: Verify Results in Hardware
1. AN 851: Incremental Block-Based Compilation Tutorial for Intel® Arria® 10 FPGA Development Board

1.3.3. Step 3: Create Design Partitions

After identifying the timing-critical design blocks, you can partition and recompile the design to preserve the results for the partitions that meet timing. Follow these steps to partition the design:
  1. In the Project Navigator, right-click u_blinking_led_i1 in the Hierarchy tab, point to Design Partition, and select the Default partition Type. A design partition icon appears next to each instance you assign.
    Figure 8. Create Design Partitions
  2. Repeat step 1 to create partitions for the u_big_partition1_top, u_blinking_led_i2, u_blinking_led_i3, and u_blinking_led_i4 instances.
  3. If the Design Partitions Window is not already open, click Assignments > Design Partitions Window. The Design Partitions Window lists the partitions you define, along with the root partition (|) the Compiler automatically creates for each project.
    Figure 9. Design Partitions Window
  4. To compile the partitioned design, click Compile Design on the Compilation Dashboard.
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