AN 851: Incremental Block-Based Compilation Tutorial: for Intel® Arria® 10 FPGA Development Board

ID 683079
Date 7/15/2019
Public

1.3.3. Step 3: Create Design Partitions

After identifying the timing-critical design blocks, you can partition and recompile the design to preserve the results for the partitions that meet timing. Follow these steps to partition the design:
  1. In the Project Navigator, right-click u_blinking_led_i1 in the Hierarchy tab, point to Design Partition, and select the Default partition Type. A design partition icon appears next to each instance you assign.
    Figure 8. Create Design Partitions
  2. Repeat step 1 to create partitions for the u_big_partition1_top, u_blinking_led_i2, u_blinking_led_i3, and u_blinking_led_i4 instances.
  3. If the Design Partitions Window is not already open, click Assignments > Design Partitions Window. The Design Partitions Window lists the partitions you define, along with the root partition (|) the Compiler automatically creates for each project.
    Figure 9. Design Partitions Window
  4. To compile the partitioned design, click Compile Design on the Compilation Dashboard.

Did you find the information on this page useful?

Characters remaining:

Feedback Message