AN 851: Incremental Block-Based Compilation Tutorial: for Intel® Arria® 10 FPGA Development Board

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ID 683079
Date 7/15/2019
Public
Document Table of Contents
Document Table of Contents x
1. AN 851: Incremental Block-Based Compilation Tutorial for Intel® Arria® 10 FPGA Development Board
1. AN 851: Incremental Block-Based Compilation Tutorial for Intel® Arria® 10 FPGA Development Board x
1.1. Tutorial Design Overview 1.2. Downloading Tutorial Design Files 1.3. Incremental Block-Based Compilation Tutorial 1.4. Incremental Block-Based Compilation Tutorial Revision History
1.3. Incremental Block-Based Compilation Tutorial x
1.3.1. Step 1: Compile the Flat Design 1.3.2. Step 2: Identify Timing-Critical Design Blocks 1.3.3. Step 3: Create Design Partitions 1.3.4. Step 4: Analyze Timing of the Partitioned Design 1.3.5. Step 5: Preserve Timing-Closed Partitions 1.3.6. Step 6: Optimize Timing-Critical Design Blocks 1.3.7. Step 7: Verify Preservation and Optimized Results 1.3.8. (Optional) Step 8: Device Programming 1.3.9. (Optional) Step 9: Verify Results in Hardware
1. AN 851: Incremental Block-Based Compilation Tutorial for Intel® Arria® 10 FPGA Development Board

1.4. Incremental Block-Based Compilation Tutorial Revision History

Table 3.  Document Revision History
Document Version Software Version Changes
2019.07.15 19.2
  • Updated description of partition type GUI.
2018.11.10 18.1
  • Updated screenshots.
  • Updated steps to reflect latest timing results.
  • Updated link to latest version of design example files.
2018.06.27 18.0
  • Replaced references to compile.sh with compile.tcl.
  • Replaced references to restore.sh with restore.tcl.
2018.06.26 18.0 Corrected link to design example files.
2018.06.22

18.0

Initial release of the document.
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