AN 851: Incremental Block-Based Compilation Tutorial: for Intel® Arria® 10 FPGA Development Board

ID 683079
Date 7/15/2019

1.3.9. (Optional) Step 9: Verify Results in Hardware

After device programming you can verify the results of this tutorial in hardware. After completing this tutorial, LEDs D6-D3 map to the blinking_led_top instance, and LEDs D10-D7 map to the top-level design. After you configure the FPGA with the SRAM Object File (.sof), blinking_led flashes red LEDs in the following order:

  1. D3 blinks every two seconds
  2. D4 blinks every four seconds
  3. D5 blinks every eight seconds
  4. D6 blinks every 16 seconds

The top-level design illuminates LEDs D10-D7 as a shifting bit in green.

Figure 21. Illumination of LEDs during Hardware Verification