P-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* User Guide

ID 683059
Date 4/10/2023

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4.4.7. TX Flow Control Interface

Before a TLP can be transmitted, flow control logic verifies that the link partner's RX port has sufficient buffer space to accept it. The TX Flow Control interface reports the link partner's available RX buffer space to the Application. It reports the space available in units called Flow Control credits for posted, non-posted and completion TLPs (as defined in the RX Flow Control Interface section).

TX credit limit signals are provided in a TDM manner similar to how the RX credit limit signals are provided.

Figure 27. TX Flow Control Interface's TDM Reporting of Credit Limits
Figure 28. Example of Buffer Limits Update

This example shows how this interface is updated when multiple MWr requests are sent. The tx_cdts_limit_o[15:0] bus value is incremented when a TLP is acknowledged by the receiver and will roll over when reaching 0xFFFF.

Table 57.  TX Flow Control Interface
Signal Name Direction Description Clock Domain EP/RP/BP
tx_cdts_limit_o[15:0] O

Indicate the Flow Control (FC) credit units advertised by the remote Receiver.

These signals represent the total number of FC credits made available by the Receiver since Flow Control initialization. Initially, these signals indicate the number of FC credits available in the remote Receiver. The value of these signals always increments and rolls over.

For example, if the remote Receiver advertises an initial Non-Posted Header (NPH) FC credit of 0xFFFF, after it receives a MRd request, the NPH FC credits value increments by 1 and rolls over to 0x0000.

The tx_cdts_limit_tdm_idx_o[2:0] signals determine the traffic type.

When the traffic type is header credit, only the LSB 12 bits are valid.

Note that, in addition to the TLPs transmitted by the user application, internally generated TLPs also consume FC credits.

coreclkout_hip EP/RP/BP
tx_cdts_limit_tdm_idx_o[2:0] O

Indicate the traffic type for the tx_cdts_limit_o[15:0] signals.

This interface provides credit limit information for all enabled ports in a TDM manner.

The following encodings are defined:
  • 000: P header credit limit
  • 001: NP header credit limit
  • 010: CPL header credit limit
  • 011: reserved
  • 100: P data credit limit
  • 101: NP data credit limit
  • 110: CPL data credit limit
  • 111: reserved
coreclkout_hip EP/RP/BP