18.104.22.168. Using Direct User Avalon-MM Interface (Byte Access)
Targeting PF Configuration Space Registers
User application needs to specify the offsets of the targeted PF registers.
For example, if the application wants to read the MSI Capability Register of PF0, it will issue a Read with address 0x0050 to target the MSI Capability Structure of PF0.
Targeting VF Configuration Space Registers
User application needs to first specify the VF number of the targeted configuration register.
The application needs to program the User Avalon-MM Control Register at offset 0x10406A accordingly.
- Issue a user Avalon® -MM Write request with address 0x10406A and data 0xE ( vf_num[28:18] = 3, vf _select = 1).
- Issue a user Avalon® -MM Read request with address 0xB0 to access VF3 registers of Physical Function 0. In the case of Physical Function 1, the address will be 0x10B0.
Targeting VSEC Registers
User application needs to program the VSEC field (0x104068 bit) first. Then all accesses from the user Avalon® -MM interface starting at offset 0xD00 will be translated to VSEC configuration space registers.
Did you find the information on this page useful?