Developer Guide

FPGA Optimization Guide for Intel® oneAPI Toolkits

ID 767853
Date 12/16/2022
Public

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Modify the Rounding Mode of Floating-point Operations (<span class='codeph'>-Xsrounding=<rounding_type></span>)

To modify the rounding mode of floating-point elementary operations in your design, use the -Xsrounding=<rounding_type> option in your icpx command. You can set the -Xsrounding option to one of the following values:

  • ieee: All elementary operations (+, -, *, /) of both single-precision and double-precision floating-point use IEEE-754 round nearest ties to even (RNE) mode, which has a 0.5 unit of least precision (ULP) error at most.
  • faithful: All elementary operations of double-precision floating-point and multiplication and division of single-precision floating-point use faithful rounding mode, which has a 1 ULP error at most. This rounding mode leads to more efficient hardware at the expense of numerical variation in results. Addition and subtraction of single-precision floating-point still have to use IEEE-754 RNE rounding mode.

The following tables summarize the rounding modes:

Single-precision Floating-point

 

Addition

Subtraction

Multiplication

Division

Default

IEEE-754 RNE

IEEE-754 RNE

IEEE-754 RNE

Faithful

-Xsrounding=ieee

IEEE-754 RNE

IEEE-754 RNE

IEEE-754 RNE

IEEE-754 RNE

-Xsrounding=faithful

IEEE-754 RNE

IEEE-754 RNE

Faithful

Faithful

Double-precision Floating-point

  Addition Substraction Multiplication Division

Default

IEEE-754 RNE

IEEE-754 RNE

IEEE-754 RNE

IEEE-754 RNE

-Xsrounding=ieee

IEEE-754 RNE

IEEE-754 RNE

IEEE-754 RNE

IEEE-754 RNE

-Xsrounding=faithful

Faithful Faithful Faithful Faithful

Examples

icpx -fsycl -fintelfpga -Xshardware -Xsrounding=ieee <source_file>.cpp
icpx -fsycl -fintelfpga -Xshardware -Xsrounding=faithful <source_file>.cpp