Developer Guide

FPGA Optimization Guide for Intel® oneAPI Toolkits

ID 767853
Date 12/16/2022
Public

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Document Table of Contents

Force Fewer Read Data Reorder Units to Reduce Area (<span class='codeph'>-Xsnum-reorder</span>)

When the Intel® oneAPI DPC++/C++ Compiler implements a ring topology for the global memory interconnect (either by automatic choice or by forcing the ring through -Xsglobal-ring), it widens the interconnect by default to allow more reads to occur in parallel. This allows for saturation of the global memory throughput using read-only traffic.

To narrow the interconnect in order to save area while reducing read-only throughput, use the -Xsnum-reorder=N option in your icpx command, where N is the number of bank's worth of read bandwidth you desire. For example, if on a two-bank BSP, you require only one bank's worth of read bandwidth, set -Xsnum-reorder=1.

Example

icpx -fsycl -fintelfpga -Xshardware -Xsnum-reorder=1 <source_file>.cpp