Developer Guide

Contents

Global Memory Accesses Optimization

The 
Intel® oneAPI
DPC++/C++
Compiler
uses SDRAM as global memory. By default, the compiler configures global memory in a burst-interleaved configuration. The
Intel® oneAPI
DPC++/C++
Compiler
interleaves global memory across each of the external memory banks.
In most circumstances, the default burst-interleaved configuration leads to the best load balancing between memory banks. However, in some cases, you might want to partition the banks manually as two non-interleaved (and contiguous) memory regions to achieve better load balancing.
The following figure illustrates the difference in memory mapping patterns between burst-interleaved and non-interleaved memory partitions:
Global Memory Partitions
Global Memory Partitions

Product and Performance Information

1

Performance varies by use, configuration and other factors. Learn more at www.Intel.com/PerformanceIndex.