Register
A register is the most basic storage element in an FPGA. It has an input (
in
), an output (out
), and a clock signal (clk
). It is synchronous, that is, it synchronizes output changes to a clock. In an ALM, a register may store the output of the LUT.
The following figure illustrates a register:
Register

The clock signal is implied and not shown in some figures.
The following figure illustrates the waveform of register signals:
Waveform of Register Signals

The input data propagates to the output on every clock cycle. The output remains unchanged between clock cycles.