仅对英特尔可见 — GUID: mcn1413182248414
Ixiasoft
当DCLK-to-DATA[] >1时的FPP配置时序
符号 | 参数 | 最小值 | 最大值 | 单位 |
---|---|---|---|---|
tCF2CD | nCONFIG low to CONF_DONE low | — | 600 | ns |
tCF2ST0 | nCONFIG low to nSTATUS low | — | 600 | ns |
tCFG | nCONFIG low pulse width | 2 | — | μs |
tSTATUS | nSTATUS low pulse width | 268 | 3,000 116 | μs |
tCF2ST1 | nCONFIG high to nSTATUS high | — | 3,000 116 | μs |
tCF2CK 117 | nCONFIG high to first rising edge on DCLK | 3,010 | — | μs |
tST2CK 117 | nSTATUS high to first rising edge of DCLK | 10 | — | μs |
tDSU | DATA[] setup time before rising edge on DCLK | 5.5 | — | ns |
tDH | DATA[] hold time after rising edge on DCLK | N–1/fDCLK 118 | — | s |
tCH | DCLK high time | 0.45 × 1/fMAX | — | s |
tCL | DCLK low time | 0.45 × 1/fMAX | — | s |
tCLK | DCLK period | 1/fMAX | — | s |
fMAX | DCLK frequency (FPP ×8/×16/×32) | — | 100 | MHz |
tR | Input rise time | — | 40 | ns |
tF | Input fall time | — | 40 | ns |
tCD2UM | CONF_DONE high to user mode 119 | 175 | 830 | μs |
tCD2CU | CONF_DONE high to CLKUSR enabled | 4 × maximum DCLK period | — | — |
tCD2UMC | CONF_DONE high to user mode with CLKUSR option on | tCD2CU + (600 × CLKUSR period) | — | — |
相关信息
116 如果不通过扩展nCONFIG或nSTATUS低脉冲宽度来延迟配置,那么可以获得此值。
117 如果nSTATUS被监控,那么遵循tST2CK规范。如果nSTATUS没被监控,那么遵循tCF2CK规范。
118 N是 DCLK-to-DATA比率,fDCLK是系统运行的DCLK频率。
119 最小和最大数量仅在您使用内部振荡器作为初始化器件的时钟源时适用。