GTS Transceiver PHY User Guide: Agilex™ 3 FPGAs and SoCs

ID 848344
Date 4/07/2025
Public

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3.8.2. Power On Reset Requirements

Power On reset requirements are the same as for run-time reset.
The following requirement only applies to simulations:
  • You must apply the i_tx_reset and i_rx_reset resets at the start of any simulation to mimic the power on reset operation.
  • Refer to Run-time Reset Sequence—TX + RX for details about asserting and deasserting the TX and RX resets together.