Embedded Memory User Guide: Agilex™ 5 FPGAs and SoCs

ID 813901
Date 4/01/2024
Public

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2.4.3. ECC Read-During-Write Behavior

For M20K blocks, you can select either Old Data or Don't Care output mode. By default, the mixed port read-during-write mode is set to Don't Care. When the mixed port read-during-write is set as Don't Care, both RAM data output and eccstatus will be 'X'. However, if the mixed port read-during-write mode is set as Old Data, the RAM data output will be the old data and the ECC status will be a deterministic value.