Embedded Memory User Guide: Agilex™ 5 FPGAs and SoCs

ID 813901
Date 4/01/2024
Public

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3.4. Consider Power-Up State and Memory Initialization

Consider the power-up state of the different types of memory blocks if your design logic evaluates the initial power-up values.
Table 14.  Initial Power-Up Values of Embedded Memory Blocks
Memory Type Output Registers Power-Up Value
MLAB Used Zero (cleared)
Bypassed Read memory contents*
M20K Used Zero (cleared)
Bypassed Zero (cleared)
*Refer to the .mif for the memory contents. If there is no .mif, the power-up value is Zero (cleared).

By default, the Quartus® Prime software initializes the embedded memory block in Agilex™ 5 devices to zero, unless you specify in the memory contents in a .mif.

The MLAB and M20K embedded memory blocks support initialization with a .mif. Even if a memory is pre-initialized (for example, using a .mif), the memory still powers up with its output cleared.