Embedded Memory User Guide: Agilex™ 5 FPGAs and SoCs

ID 813901
Date 4/01/2024
Public

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3.3. Customize Read-During-Write Behavior

Customize the read-during-write behavior of the memory blocks to suit your design requirements.
Figure 21. Read-During-Write Data FlowThis figure shows the difference between the two types of read-during-write operations available: same port and mixed port.


If you are configuring same-port or mixed-port read-during-write mode with byte enable permutation in simple quad-port RAM, add enable_vcs_sqp_be_rdw = 1 define flag in the VCS simulator.