F-Tile Low Latency 50G Ethernet Intel® FPGA IP User Guide

ID 758946
Date 4/03/2024
Document Table of Contents

5.1.5. 50 GbE RX PCS

The RX PCS datapath consists of:
  • RX PCS descrambler—enables the incoming scrambled data to be descrambled.
  • RX PCS decoder—decodes the incoming encoded data from the PMA interface.