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2.1.1. Selecting Your External Memory Device
2.1.2. Selecting Your FPGA
2.1.3. Planning Your Pin Requirements
2.1.4. Planning Your FPGA Resources
2.1.5. Determining Your Board Layout
2.1.6. Specifying Parameters for Your External Memory Interface
2.1.7. Performing Functional Simulation
2.1.8. Adding Design Constraints
2.1.9. Compiling Your Design and Verifying Timing
2.1.10. Verifying and Debugging External Memory Interface Operation
3.1. DDR SDRAM Features
3.2. DDR2 SDRAM Features
3.3. DDR3 SDRAM Features
3.4. QDR, QDR II, and QDR II+ SRAM Features
3.5. RLDRAM II and RLDRAM 3 Features
3.6. LPDDR2 Features
3.7. Memory Selection
3.8. Example of High-Speed Memory in Embedded Processor
3.9. Example of High-Speed Memory in Telecom
3.10. Document Revision History
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3. Selecting Your Memory
System architects must consider architecture, algorithms, and features of the available components.
Typically, one of the fundamental problems in high-performance applications is memory, because the challenges and limitations of system performance often reside in memory architecture. As higher speeds become necessary for external memories, signal integrity becomes more challenging; newer devices include several features to address this challenge. Intel® FPGAs include dedicated I/O circuitry, various I/O standard support, and specialized intellectual property (IP).
When you select an external memory device, consider the following factors:
- Bandwidth and speed
- Cost
- Data storage capacity
- Latency
- Power consumption
Because no single memory type can excel in every area, system architects must determine the right balance for their design. The following table lists the two common types of high-speed memories and their characteristics.
| Memory Type |
Description |
Bandwidth and Speed |
Cost |
Data Storage Size and Capacity |
Power consumption |
Latency |
|---|---|---|---|---|---|---|
| DRAM |
A dynamic random access memory (DRAM) cell consisting of a capacitor and a single transistor. DRAM memory must be refreshed periodically to retain the data, resulting in lower overall efficiency and more complex controllers. Generally, designers select DRAM where cost per bit and capacity are important. DRAM is commonly used for main memory. |
Lower bandwidth resulting in slower speed |
Lower cost |
Higher data storage and capacity |
Higher power consumption |
Higher latency |
| SRAM |
A static random access memory (SRAM) cell that consists of six transistors. SRAM does not need to be refreshed because the transistors continue to hold the data as long as the power supply is not cut off. Generally, designers select SRAM where speed is more important than capacity. SRAM is commonly used for cache memory. |
Higher bandwidth resulting in faster speed |
Higher cost |
Lower data storage and capacity |
Lower power consumption |
Lower latency |
Note: The Intel® FPGA IP might or might not support all of the features supported by the memory.
To compare the performance of the supported external memory interfaces in Intel® FPGA devices, refer to the External Memory Interface Spec Estimator on the Intel® website.
Section Content
DDR SDRAM Features
DDR2 SDRAM Features
DDR3 SDRAM Features
QDR, QDR II, and QDR II+ SRAM Features
RLDRAM II and RLDRAM 3 Features
LPDDR2 Features
Memory Selection
Example of High-Speed Memory in Embedded Processor
Example of High-Speed Memory in Telecom
Document Revision History
Related Information