F-Tile HDMI Intel® FPGA IP Design Example User Guide

ID 709314
Date 12/04/2023
Public
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2.6. Design Software Flow

In the design main software flow, the Nios® II processor configures the TI redriver setting and initializes the TX and RX paths upon power-up.
Figure 17. Software Flow in main.c Script
The software executes a while loop to monitor sink and source changes, and to react to the changes. The software may trigger TX reconfiguration, TX link training and start transmitting video. Refer to the following figures for the detailed flows:
Figure 18. Initialize TX Path Flowchart
Figure 19. Initialize RX Path Flowchart
Figure 20. TX Reconfiguration and Link Training Flowchart
Note: Refer to Perform TX Link Training Flowchart for more details about Perform TX Link Training.
Figure 21. Perform TX Link Training Flowchart
Note: Refer to TX Reconfiguration and Link Training Flowchart for continuation of Perform TX Link Training.
Note: Refer to Perform TX Link Training Flowchart for more detail about Perform LTS: 3 Process at Specific FRL Rate.
Figure 22. Perform LTS:3 Process at Specific FRL Rate Flowchart
Note: Refer to Perform TX Link Training Flowchart for continuation of Perform LTS: 3 Process at Specific FRL Rate.