DisplayPort Intel® Agilex™ F-Tile FPGA IP Design Example User Guide

ID 709308
Date 12/13/2021

A newer version of this document is available. Customers should click here to go to the newest version.

1.5. Compiling and Simulating the Design

Figure 5. Compiling and Simulating the Design
To compile and run a demonstration test on the hardware example design, follow these steps:
  1. Ensure hardware example design generation is complete.
  2. Launch the Intel® Quartus® Prime Pro Edition software and open <project>/quartus/agi_dp_demo.qpf.
  3. Click Processing > Start Compilation.
  4. Wait until Compilation completes.
    Note: The design example does not functionally verify Preliminary Design Example on hardware in this Quartus release.