2. Intel FPGA Simulation Basics
This document describes Intel® Quartus® Prime software support for simulating designs that target Intel FPGA devices. Simulation allows you to verify your design's behavior before configuring the FPGA device with the verified design. You specify input vectors to your simulator, and then the simulator determines and reports the expected corresponding outputs during the time period you specify.
Prior to simulation, you compile the RTL or gate-level representation of your design and testbench. You must also compile IP simulation models, models from the Intel FPGA simulation libraries, and any other model libraries required for your design.
The Intel FPGA simulation process involves setting up your supported simulator working environment, compiling simulation model libraries, generating simulation files, running your simulator, and interpreting the results.
Did you find the information on this page useful?