1. AN 923: Routing Intel® Stratix® 10 HPS Peripherals to FPGA Fabric
|Intel® Quartus® Prime Design Suite 20.3|
The Intel® Stratix® 10 SoC device families integrate an Arm* Cortex-A53-based hard processor system (HPS) consisting of processor, peripherals, and memory interface with the FPGA fabric using a high-bandwidth interconnect backbone. The Intel® Stratix® 10 HPS interface provides up to 48 I/O pins to share with multiple peripherals through sets of configurable multiplexers.
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