AN 690: PCI Express* Avalon® -MM DMA Reference Design

ID 683824
Date 5/08/2017

1.3. Avalon-MM DMA

The Avalon-MM interface with DMA includes the following modules:

Read Data Mover

The Read Data Mover sends memory read TLPs upstream. After the Completion is received, it writes the received data to the on-chip memory.

Write Data Mover

The Write Data Mover reads data from on-chip memory and sends it upstream using Memory Write TLPs on the PCI Express link.

Descriptor Controller

The Descriptor Controller module manages the DMA read and write operations. This module is embedded into the main DMA to facilitate the customization of descriptor handling. For your application, you can use an external descriptor controller.

Inside the controller, a FIFO stores the descriptors that the Read Data Mover fetches. The host software programs the internal registers of the Descriptor Controller with the location and size of the descriptor table residing in the PCI Express main memory through the RX Avalon-MM master port. Based on this information, the descriptor controller directs the Read Data Mover to copy the entire table and store it in the internal FIFO. The controller then fetches the table entries and directs the DMA to transfer the data between the Avalon-MM and PCIe domains one descriptor at a time. It also sends DMA status upstream via the TX Avalon-MM slave port.

TX Slave

The TX Avalon-MM slave module propagates 32-bit Avalon-MM reads and writes upstream. External Avalon-MM masters, including the DMA control master, can access PCI Express memory space using the TX Slave. The DMA uses this path to update the DMA status upstream, including Message Signaled Interrupt (MSI) status.

RX Master

The RX Master module propagates single dword read and write TLPs from the Root Port to the Avalon-MM domain via a 32-bit Avalon-MM master port. Software programs the RX Master to send control, status, and descriptor information to Avalon-MM slave, including the DMA control slave.