AN 690: PCI Express* Avalon® -MM DMA Reference Design

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ID 683824
Date 5/08/2017
Public
Document Table of Contents
Document Table of Contents x
1. AN 690: PCI Express Avalon-MM DMA Reference Design
1. AN 690: PCI Express Avalon-MM DMA Reference Design x
1.1. Deliverables Included with the Reference Design 1.2. Reference Design Functional Description 1.3. Avalon-MM DMA 1.4. Reference Design 1.5. DMA Operation Flow 1.6. Running the Reference Design 1.7. Understanding PCI Express Throughput 1.8. Document Revision History for AN-690
1.2. Reference Design Functional Description x
1.2.1. Parameter Settings
1.6. Running the Reference Design x
1.6.1. Installing the Driver and Application 1.6.2. Installing the Windows Software 1.6.3. Installing the Hardware 1.6.4. Running the Software 1.6.5. Peak Throughput
1.7. Understanding PCI Express Throughput x
1.7.1. Throughput for Posted Writes 1.7.2. Throughput for Reads
1.7.1. Throughput for Posted Writes x
1.7.1.1. Specifying the Maximum Payload Size
1. AN 690: PCI Express Avalon-MM DMA Reference Design

1.5. DMA Operation Flow

Software running on the host completes the following steps to initiate the DMA and verify the results.
  1. Software allocates free memory space in the system memory to populate the descriptor table.
  2. Software allocates free space in the system memory for the data to be moved to and from the system memory by the DMA.
  3. Software writes all descriptors into the descriptor table in the system memory. The DMA supports up to 128 descriptors. Each descriptor has an ID, from descriptor ID 0 to descriptor ID 127. Each descriptor contains the source address, destination address, and size of the data to be moved. The source address specifies the location of the data to be moved from by the DMA. The destination address specifies the location of the data to be moved to by the DMA.
  4. For the read DMA operation, the software initializes the random data in the system memory space. The Read Data Mover moves this data from the system memory to the on-chip memory. For write DMA operation, the software initializes the random data in the on-chip memory. The Write Data Mover moves the data from the on-chip memory to the system memory space.
  5. As the last step to start the DMA, software writes the ID of the last descriptor into the Descriptor Controller's control logic. This write triggers the Descriptor Controller to start the DMA. The DMA then starts fetching the descriptors in order from descriptor 0 to the last descriptor.
  6. After the last descriptor completes, the Descriptor Controller writes a "1" to the Done bit in the last descriptor in the PCIe domain through the Txs port.
  7. Software continues polling the Done bit in the last descriptor. The DMA operation is said to be completed when the Done bit is set and the performance number is calculated. Once the DMA completes, Software compares the data in system memory and the on-chip memory. The test passes if there is no data mismatch.
  8. For simultaneous operation, the software starts the read DMA operation followed by the write DMA. The operation is considered done after both the read and write DMA operation flows complete.
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