AN 690: PCI Express* Avalon® -MM DMA Reference Design

ID 683824
Date 5/08/2017
Public

1.7.1. Throughput for Posted Writes

The theoretical maximum throughput calculation uses the following formula:

Throughput  = payload size / (payload size + overhead) * link data rate

Figure 5. Maximum Throughput for Memory Writes The graph shows the maximum throughput with different TLP header and payload sizes. The DLLPs and PLPs are excluded from this calculation. For a 256-byte maximum payload size and a 3-dword header the overhead is five dwords. Because the interface is 256 bits, the 5-dword header requires a single bus cycle. The 256-byte payload requires 8 bus cycles.
The following equation shows maximum theoretical throughput:
Maximum throughput = 8 cycles/9 cycles  = 88.88% * 8 GBps = 7.2 GBps

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