AN 690: PCI Express* Avalon® -MM DMA Reference Design

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ID 683824
Date 5/08/2017
Public
Document Table of Contents
Document Table of Contents x
1. AN 690: PCI Express Avalon-MM DMA Reference Design
1. AN 690: PCI Express Avalon-MM DMA Reference Design x
1.1. Deliverables Included with the Reference Design 1.2. Reference Design Functional Description 1.3. Avalon-MM DMA 1.4. Reference Design 1.5. DMA Operation Flow 1.6. Running the Reference Design 1.7. Understanding PCI Express Throughput 1.8. Document Revision History for AN-690
1.2. Reference Design Functional Description x
Project Hierarchy 1.2.1. Parameter Settings
1.6. Running the Reference Design x
1.6.1. Installing the Driver and Application 1.6.2. Installing the Windows Software 1.6.3. Installing the Hardware 1.6.4. Running the Software 1.6.5. Peak Throughput
1.7. Understanding PCI Express Throughput x
1.7.1. Throughput for Posted Writes 1.7.2. Throughput for Reads
1.7.1. Throughput for Posted Writes x
1.7.1.1. Specifying the Maximum Payload Size
1. AN 690: PCI Express Avalon-MM DMA Reference Design

1.2. Reference Design Functional Description

The reference design includes the following components:

  • An Application Layer which is an Avalon-MM DMA example design generated in Platform Designer
  • An Arria® V , Arria 10, Cyclone® V , Stratix® V , or Stratix 10 Hard IP for PCI Express IP Core
  • A Linux or Windows software application and driver configured specifically for this reference design

Project Hierarchy

The reference design uses the following directory structures:

  • top — the project directory. The top-level directory is top_hw.
  • pcie_lib — includes all design files. If you modify the design, you must copy the modified files into this folder before recompiling the design.

Section Content
Parameter Settings

Level Two Title

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