1.2. Reference Design Functional Description
The reference design includes the following components:
- An Application Layer which is an Avalon-MM DMA example design generated in Platform Designer
- An Arria® V , Arria 10, Cyclone® V , Stratix® V , or Stratix 10 Hard IP for PCI Express IP Core
- A Linux or Windows software application and driver configured specifically for this reference design
The reference design uses the following directory structures:
- top — the project directory. The top-level directory is top_hw.
- pcie_lib — includes all design files. If you modify the design, you must copy the modified files into this folder before recompiling the design.
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